Z80 registers and flags

Registers hold values inside the CPU. Flags record facts about the result of an instruction.

8-bit · 16-bit · flags

The Z80 has small 8-bit registers and register pairs that hold 16-bit values. Programs use them for numbers, addresses, counters and temporary values. The register panel in the lessons shows each byte and pair.

General registers

Register	Size	Common use
A	8 bits	Accumulator. Many arithmetic and logic instructions use A.
F	8 bits	Flag register. Its documented bits are S, Z, H, P/V, N and C.
B, C, D, E, H, L	8 bits each	General storage. They can also form BC, DE and HL pairs.
AF, BC, DE, HL	16 bits each	Pairs combine two bytes: for example BC = B × 256 + C. HL often points to memory.
IX, IY	16 bits each	Index pointers. An instruction can use an offset, such as (IX+1).
SP	16 bits	Stack Pointer. PUSH and CALL move it down; POP and RET move it up.
PC	16 bits	Program Counter. It points to the next instruction byte to fetch.
AF′, BC′, DE′, HL′	alternate pairs	A second register bank. EX AF,AF′ swaps AF; EXX swaps BC, DE and HL.
I	8 bits	Interrupt Vector register. In interrupt mode 2, I supplies the high byte of a vector-table address.
R	8 bits	Refresh register. Its low seven bits advance during opcode fetch cycles; bit 7 is preserved.

A register pair is two existing bytes viewed together. AF is A plus F; BC is B plus C. The apostrophe marks the alternate register bank.

Flags in F

After some instructions, the CPU sets or clears flags to describe the result. A conditional jump can test them. The six documented flags are shown below.

Sbit 7
sign

Zbit 6
zero

Hbit 4
half-carry

P/Vbit 2
parity / overflow

Nbit 1
subtract

Cbit 0
carry

Bits 5 and 3 are undocumented flag bits. This course does not teach or display them as flags.

What the flags tell you

Flag	Meaning	Example
S	Copies the top bit of an 8-bit result.	80h has S=1.
Z	Set when the result is zero.	FFh + 1 gives 00h, so Z=1.
H	Carry from bit 3 to bit 4. Useful for BCD adjustment.	0Fh + 1 sets H.
P/V	Parity for some logic operations; signed overflow for addition and subtraction.	7Fh + 1 gives 80h and sets overflow.
N	1 after subtraction; 0 after addition.	SUB sets N.
C	Carry out or borrow for 8-bit arithmetic. Some instructions use it as an input bit.	FFh + 1 gives 00h and sets C.

Flags depend on the instruction. For example, INC changes S, Z, H and P/V but preserves C. Read the instruction’s flag rules before using a conditional jump.

Example: one value, several views

After LD A,7Fh followed by ADD A,1, A becomes 80h. As an unsigned value that is 128. As signed 8-bit two’s complement it represents −128. The flags report S=1 and P/V=1, while C=0. A and F together form AF.